FIFO on SLC5/04

chavak

Member
Join Date
Jul 2002
Posts
750
What will the FFU, FFL pair priority, when the load and unload bits is active in the same scan?

Am I correct to say the FFU will load a new value to the stack when the first rung (Rung 1)is being scanned and in the second rung (Rung 2) the FFL will unload a value when it is being scanned.

Thank You
_____________
 
That sounds correct to me.

Since they are memory operations, I think they happen at the time the instruction is run instead of being updated at the end of the scan. So they should behave just like you described.
 
Am I correct to say the FFU will load a new value to the stack when the first rung (Rung 1)is being scanned and in the second rung (Rung 2) the FFL will unload a value when it is being scanned.

The FFU will unload the stack on each false to true transition of the rung. It will move the value from the first location in the array to the destination and shift all the values in the stack down one element, and decrement the position value of the control element.

The FFL, when false to true transition occurs, will increment the Position value of the control element, and put the value from the source into the location indicated by the position of the control element.

If these operations occur on the same program scan, you will see all the data move down one position, but the position value will not change since it was decremented and immediately incremented again. The EU/EN bit does not enable the FFU/FFL instruction, it's the other way around. When the rung is false, the bit is reset. When the rung is true, if the bit is not set, the operation is performed, then the bit is set. That's how the false to true transition of the instruction is recorded. The rung may stay true for 2 program scans, or five minutes, but the instruction only operates once following each transtition.
 

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